Advanced Micro Devices (AMD) and International Business Machines (IBM) have developed a new technology that they claim will deliver higher performance margins, from their latest microprocessors, with dual stress liner technology.

The dual stress liner technology is a new manufacturing technique, developed by AMD and IBM, which use a new method of implementation of using the strained silicon on positive and negative transistors. It seemed almost impossible to increase the performance of the chips by merely reducing their transistor size, but AMD and IBM have changed this theory.

AMD and IBM believe that by using the new technology, it will yield in 24 percent increase in overall transistor speed, which should lead to better performing chips in the second-half 2005.

The new technology will be implemented in AMD’s Opteron server microprocessors, Athlon 64 microprocessors and IBM’s Power microprocessors.

Both companies signed the contract, agreeing to the research and development of the upcoming technology, and with given performance they have decided to extend their contract till 2008.

AMD and IBM will present more details on their dual stress liner technology at International Electron Devices Meeting (IEDM) in San Francisco at a later date.

Researchers from both companies are working at Dresden, Germany and East Fishkill, New York labs to further continue the development of dual stress liner technology.